Hardware-Conscious Data Processing (ST 2024) - tele-TASK
Hardware-Conscious Data Processing (ST 2024) - tele-TASK
Prof. Dr. Tilmann Rabl
Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.
Field Programmable Gate Arrays
Jul 3, 2024
1 hr 18 min
Video
Networking
Jul 2, 2024
1 hr 17 min
Video
Data Processing on GPUs II
Jun 26, 2024
1 hr 23 min
Video
Data Processing on GPUs I
Jun 25, 2024
1 hr 26 min
Video
Networking
Jun 19, 2024
1 hr 23 min
Video
Compute Express Link
Jun 12, 2024
1 hr 27 min
Video
Storage
Jun 11, 2024
1 hr 17 min
Video
Non-uniform Memory Access
Jun 5, 2024
1 hr 25 min
Video
Concurrency and Synchronization
Jun 4, 2024
1 hr 24 min
Video
Multicore Parallelism (2)
May 29, 2024
1 hr 22 min
Video
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