Hardware-Conscious Data Processing (ST 2022) - tele-TASK
Hardware-Conscious Data Processing (ST 2022) - tele-TASK
Prof. Dr. Tilmann Rabl
Hardware development continuously advances, with different technologies improving at different pace. While the amount of transistors in a CPU package are growing, the single core performance is stagnating due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture; the storage hierarchy; modern memory technolgoies, such as NVM and NVMe; fast interconnects, such as Infiniband, RDMA, and NVLink; and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware concious data processing.
Persistent Memory
Jun 14, 2022
1 hr 30 min
Video
Query Execution Models
Jun 8, 2022
1 hr 26 min
Video
Data Structures
May 31, 2022
1 hr 28 min
Video
Multicore Parallelism
May 17, 2022
1 hr 27 min
Video
SIMD & Task 1: SIMD Scan
May 10, 2022
55 min
Video
CPU - Instruction Execution & SIMD
May 5, 2022
1 hr 25 min
Video
CPU - Instruction Execution
May 3, 2022
1 hr 26 min
Video
CPU and Caching
Apr 28, 2022
1 hr 29 min
Video
Performance Management & Benchmarking
Apr 26, 2022
1 hr 32 min
Video
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