Thomas Sohmers joins to discuss dropping out of high school at age 17 to start a chip company, lessons from the successes and failures of past processor architectures, the history of VLIW, and the new AI hardware appliances he and his team are building at Positron AI.Thomas on X: https://twitter.com/trsohmersThomas' Site: https://www.trsohmers.com/Show NotesWelcome Thomas Sohmers

Growing Up Around Computers

Digging Beneath the Software

Learning Python, C, and Arduino C

https://www.arduino.cc/reference/en/Learning About the Thiel Fellowship

https://thielfellowship.org/Starting Research at MIT at age 14

Dropping out of High School and Starting Thiel Fellowship at age 17

MIT ISN Lab

https://isn.mit.edu/Evaluating ARM Processors for High Performance Computing

https://en.wikipedia.org/wiki/ARM_architecture_familyARM Calxeda Processor

https://en.wikipedia.org/wiki/Calxedahttps://www.zdnet.com/article/what-the-death-of-calxeda-means-for-the-future-of-microservers/Scaling Out Low Power Processors for Data Center Compute

Incorporating REX Computing

http://rexcomputing.com/https://fortune.com/2015/07/21/rex-computing/Facebook and the Open Compute Project

https://www.opencompute.org/Deciding Against Arm

ARMv8

https://en.wikichip.org/wiki/arm/armv8Deciding to Design a New Architecture

Multiflow

https://en.wikipedia.org/wiki/MultiflowGood Architecture Ideas from the Past

Thomas' Talk at Stanford

https://youtu.be/ki6jVXZM2XURISC vs. CISC Debate

https://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/SPARC Instruction Set

https://en.wikipedia.org/wiki/SPARCThe Importance of History

RISC Came Before CISC

CDC 6600

https://en.wikipedia.org/wiki/CDC_6600Load-Store Architecture

https://en.wikipedia.org/wiki/Load–store_architectureIBM System/360

https://en.wikipedia.org/wiki/IBM_System/360PowerPC

https://en.wikipedia.org/wiki/PowerPCVLIW

https://en.wikipedia.org/wiki/Very_long_instruction_wordELI-512 and Josh Fisher

https://dl.acm.org/doi/pdf/10.1145/800046.801649https://en.wikipedia.org/wiki/Josh_FisherFloating Point Systems, Inc. (FPS)

https://en.wikipedia.org/wiki/Floating_Point_SystemsMultiflow Compiler

https://www.cs.yale.edu/publications/techreports/tr364.pdfInstruction Level Parallelism

https://en.wikipedia.org/wiki/Instruction-level_parallelismIntel Itanium

https://en.wikipedia.org/wiki/ItaniumItanium is not a VLIW Architecture

Explicitly Parallel Instruction Computer (EPIC)

https://en.wikipedia.org/wiki/Explicitly_parallel_instruction_computingx86 and Pentium

https://en.wikipedia.org/wiki/X86https://en.wikipedia.org/wiki/PentiumImpact of Branch Prediction and Caching on Determinism

https://en.wikipedia.org/wiki/Branch_predictorhttps://en.wikipedia.org/wiki/CPU_cacheWhy Itanium Failed

REX's NEO Architecture

http://rexcomputing.com/#neoarchHard Real-Time Determinism

Scratchpad Memory

https://en.wikipedia.org/wiki/Scratchpad_memoryRemoving Memory Management (TLB, MMU, etc.)

https://en.wikipedia.org/wiki/Translation_lookaside_bufferhttps://en.wikipedia.org/wiki/Memory_management_unitALU, FPU, and Register Files

https://en.wikipedia.org/wiki/Arithmetic_logic_unithttps://en.wikipedia.org/wiki/Floating-point_unithttps://en.wikipedia.org/wiki/Register_fileBenefits of Removing Implicit Caching Layers

VLIW in Signal Processing

https://en.wikipedia.org/wiki/Digital_signal_processorVLIW Won in a Silent Way

Original Reason for Hardware-Managed Caching

Impact of VLIW and Software-Managed Memory on Compile Times

http://www.ai.mit.edu/projects/aries/Documents/vliw.pdfLLVM and Sufficiently Advanced Open Source Compilers

https://llvm.org/Apple Transition from PowerPC to x86 to Arm