Alpha Alloy
Alpha Alloy
Hari Santhosh
RISC V CPU's - A New Wave in Open Source Hardware
20 minutes Posted Aug 11, 2019 at 10:48 am.
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Show notes
In this edition of Alpha Alloy podcast, Hari delves into the open source hardware community, how the landscape has evolved over the last decade, and talks about what the future holds with the current developments in Open Source Hardware. RISC V Instruction Set Architecture (ISA) is primarily taken as a test-bed to act as a yardstick on how the hardware community is navigating forward.